Platform Overview
The DVS Logic Development Module is a comprehensive solution designed for research and development in high-speed vision applications. This module integrates a Dynamic Vision Sensor (DVS) with an FPGA interface board, providing a robust platform for developing and testing advanced vision algorithms.
Sensor Specifications
- Spatial Resolution: 960 x 720 pixels
- Frame Rate: Over 2,000 frames per second
- Dynamic Range: Exceeds 90dB
- Operating Light Conditions: Functions reliably under more than 100,000 Lux
Environment Setting
Platform Documents
Projects
Open FPGA DVS project examples and host code references.
Utilities
Open driver manuals, DVS specifications, and NRV IP references.
Additional platform references: